4K/UHD (12G/6G/3G) video & physical layer analysis
4K/UHD has led to a proliferation of new standards and formats, with delivery using quad-link 3G, dual link 6G or single link 12G signals. These higher bandwidth signals are more challenging to manage, and physical layer testing (Eye and Jitter) at facilities is especially important in view of the greater cable length sensitivity and unforgiving nature of these high speed interfaces. As 12G-SDI continues to gather momentum for UHD applications, and many customers face a choice between SDI and IP infrastructure, there is a real need for informed and pragmatic decision making influenced by business values.
To address this requirement, PHABRIX has developed a class-leading suite of SDI analysis and stress tools that extend all the way up to UHD 12 Gbit/s that are available as an option for the Qx. Until now it has not been possible to thoroughly evaluate the behavior and performance of 6 and 12 Gbit/s SDI interfaces.
The Qx range brings together all the advanced Test & Measurement tools required for transitioning to the next generation of video formats. Designed for HD/3G/6G/12G-SDI environments, the instrument set includes tools for rapid fault diagnosis, compliance monitoring and product development.
The Qx optional Physical layer Toolset offers the fastest 12G/6G/3G/HD-SDI physical layer testing, with its RTE™ (Real-Time Eye) Technology instantly highlighting any SMPTE compliance issues including eye amplitude, transition times and overshoot. Built in automation control allows testing to be performed faster, more reliably and at lower cost.
The real-time eye analysis provides histograms of both the eye Amplitude and Time distributions, and DC coupled automatic measurements of amplitude (mode), positive and negative transition times, jitter health indication and overshoot. A single eye with auto centring, or multiple eyes, may be displayed with a choice of color and heat-map overlays and infinite persistence.
The real time SDI jitter analysis tool provides simultaneous monitoring across five specified frequency bands including measurements down to 10Hz, and video trigger options to allow the analysis of time related contributions to the overall jitter measurement.
The advanced SDI-STRESS option is available for stress testing and R&D evaluations of SDI interfaces up to 12G. It includes the ability under automation control to insert SDI clock jitter, mute any of the SDI outputs, and control the SDI scrambler, sync-bit insertion, pre-emphasis, rise time and driver amplitude. The SDI-STRESS Eye amplitude measurement provides both Shorth mean and mode, with a histogram overlay and a user-defined window for the exploration of eye amplitude.
Pseudo-Random Binary Sequence (PRBS) generation and analysis of PRBS-7, 9, 15, 23, 31 allows for deterministic measurement of link Bit Error Rates (BER).
The Generator Toolset option provides not only the core full screen SDI Pathological stress patterns (Eq, PLL, Clk, checkfield and combined), but also allows the user to define a combination of the SDI stress and conventional generator patterns up to full frame. These patterns can be duplicated on all four SDI outputs.
An SDI Pathological Detector provides indication of the rate of generation of pathological conditions, and also the detection of pathological conditions on each active SDI input with real time GPI output for external equipment triggering.
Using Pseudo-Random Binary Sequences to Stress Test Serial Digital Interfaces
In this whitepaper, PHABRIX discusses the use of pseudo-random binary sequences (PRBS - also referred to as pseudo-random bit sequences), along with bit-error rate tests (BERT – also referred to as bit-error ratio tests) to stress test serial digital interfaces. The purpose of any physical layer serial digital interface (PHY) is to transmit or receive data whilst preserving that data’s integrity. In practical systems the major cause of bit-errors is random noise. To stress test such systems, it is necessary to both generate a “noisy” bit stream and then analyse the output from the interface to determine the bit-error rate which represents the integrity of the data.